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patches/strace/4.5.17/110-dont-use-REG_SYSCALL-for-sh.patch
author Anthony Foiani <anthony.foiani@gmail.com>
Thu May 19 23:09:43 2011 +0200 (2011-05-19)
branch1.11
changeset 2465 5f98b7a90fbc
parent 747 d3e603e7c17c
permissions -rw-r--r--
complibs/ppl: fix 0.11-0.11.2 to compile with --disable-shared

PPL 0.11 (through 0.11.2) had a small bug where it still tried to build
and test its Java interface even when shared libraries are disabled.
Since that's exactly what ct-ng does, it explodes.

This is the patch from the PPL authors (see final link below).

More information can be found in these messages/threads:

Anthony's initial report and analysis with Yann:
http://www.cygwin.com/ml/crossgcc/2011-05/msg00046.html

Ron Flory hit the same problem:
http://www.cygwin.com/ml/crossgcc/2011-05/msg00054.html

Anthony's report to the ppl-devel list:
http://www.cs.unipr.it/pipermail/ppl-devel/2011-May/017450.html

Roberto's reply with a link to the fix in the PPL git repo:
http://www.cs.unipr.it/pipermail/ppl-devel/2011-May/017455.html

Signed-Off-By: Anthony Foiani <anthony.foiani@gmail.com>
(transplanted from 139b85d70b623e51f7585e7c64ecb8c6a6cf4567)
yann@974 
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Original patch from gentoo: ../../dev/crosstool-NG/ct-ng.trunk/patches/strace/4.5.17/110-dont-use-REG_SYSCALL-for-sh.patch
yann@974 
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-= BEGIN original header =-
yann@428 
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diff -dur strace-4.5.16.orig/process.c strace-4.5.16/process.c
yann@974 
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-= END original header =-
yann@974 
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diff -durN strace-4.5.17.orig/process.c strace-4.5.17/process.c
yann@974 
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--- strace-4.5.17.orig/process.c	2008-07-18 04:16:47.000000000 +0200
yann@974 
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+++ strace-4.5.17/process.c	2008-10-24 21:30:13.000000000 +0200
yann@974 
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@@ -2726,7 +2726,6 @@
yann@428 
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        { 4*REG_GBR,            "4*REG_GBR"                             },
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        { 4*REG_MACH,           "4*REG_MACH"                            },
yann@428 
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        { 4*REG_MACL,           "4*REG_MACL"                            },
yann@428 
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-       { 4*REG_SYSCALL,        "4*REG_SYSCALL"                         },
yann@428 
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        { 4*REG_FPUL,           "4*REG_FPUL"                            },
yann@428 
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        { 4*REG_FPREG0,         "4*REG_FPREG0"                          },
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        { 4*(REG_FPREG0+1),     "4*REG_FPREG1"                          },
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