yann@1
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The 30_all_gcc34-arm-ldm-peephole.patch from Debian was conflicting
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with the newer 36_all_pr16201-fix.patch, so i cut out the hunk from
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it that was causing problems and grabbed an updated version from
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upstream cvs.
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5 |
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Index: gcc/config/arm/arm.c
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===================================================================
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RCS file: /cvsroot/gcc/gcc/gcc/config/arm/arm.c,v
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retrieving revision 1.432
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retrieving revision 1.433
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diff -u -r1.432 -r1.433
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--- gcc-3.4.4/gcc/config/arm/arm.c 29 Mar 2005 03:00:23 -0000 1.432
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+++ gcc-3.4.4/gcc/config/arm/arm.c 1 Apr 2005 11:02:22 -0000 1.433
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@@ -5139,6 +5139,10 @@
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int
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adjacent_mem_locations (rtx a, rtx b)
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{
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+ /* We don't guarantee to preserve the order of these memory refs. */
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+ if (volatile_refs_p (a) || volatile_refs_p (b))
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+ return 0;
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+
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if ((GET_CODE (XEXP (a, 0)) == REG
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|| (GET_CODE (XEXP (a, 0)) == PLUS
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&& GET_CODE (XEXP (XEXP (a, 0), 1)) == CONST_INT))
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@@ -5178,6 +5182,17 @@
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return 0;
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val_diff = val1 - val0;
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+
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+ if (arm_ld_sched)
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+ {
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+ /* If the target has load delay slots, then there's no benefit
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+ to using an ldm instruction unless the offset is zero and
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+ we are optimizing for size. */
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+ return (optimize_size && (REGNO (reg0) == REGNO (reg1))
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+ && (val0 == 0 || val1 == 0 || val0 == 4 || val1 == 4)
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+ && (val_diff == 4 || val_diff == -4));
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+ }
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+
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return ((REGNO (reg0) == REGNO (reg1))
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&& (val_diff == 4 || val_diff == -4));
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}
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