1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/patches/eglibc/2_10/100-powerpc-8xx-CPU15-errata.patch Sun Mar 04 17:31:23 2012 +0100
1.3 @@ -0,0 +1,49 @@
1.4 +diff -ru eglibc-2_9_orig/sysdeps/powerpc/powerpc32/memset.S eglibc-2_9/sysdeps/powerpc/powerpc32/memset.S
1.5 +--- eglibc-2_9_orig/sysdeps/powerpc/powerpc32/memset.S 2007-04-13 08:35:45.000000000 -0700
1.6 ++++ eglibc-2_9/sysdeps/powerpc/powerpc32/memset.S 2009-05-06 16:52:04.000000000 -0700
1.7 +@@ -112,11 +112,13 @@
1.8 + clrrwi. rALIGN, rLEN, 5
1.9 + mtcrf 0x01, rLEN /* 40th instruction from .align */
1.10 +
1.11 ++#ifndef BROKEN_PPC_8xx_CPU15
1.12 + /* Check if we can use the special case for clearing memory using dcbz.
1.13 + This requires that we know the correct cache line size for this
1.14 + processor. Getting the __cache_line_size may require establishing GOT
1.15 + addressability, so branch out of line to set this up. */
1.16 + beq cr1, L(checklinesize)
1.17 ++#endif
1.18 +
1.19 + /* Store blocks of 32-bytes (256-bits) starting on a 32-byte boundary.
1.20 + Can't assume that rCHR is zero or that the cache line size is either
1.21 +@@ -158,6 +160,7 @@
1.22 + add rMEMP, rMEMP, rALIGN
1.23 + b L(medium_tail2) /* 72nd instruction from .align */
1.24 +
1.25 ++#ifndef BROKEN_PPC_8xx_CPU15
1.26 + .align 5
1.27 + nop
1.28 + /* Clear cache lines of memory in 128-byte chunks.
1.29 +@@ -191,6 +194,7 @@
1.30 + bdnz L(zloop)
1.31 + beqlr cr5
1.32 + b L(medium_tail2)
1.33 ++#endif /* ! BROKEN_PPC_8xx_CPU15 */
1.34 +
1.35 + .align 5
1.36 + L(small):
1.37 +@@ -248,6 +252,7 @@
1.38 + stw rCHR, -8(rMEMP)
1.39 + blr
1.40 +
1.41 ++#ifndef BROKEN_PPC_8xx_CPU15
1.42 + L(checklinesize):
1.43 + #ifdef SHARED
1.44 + mflr rTMP
1.45 +@@ -329,6 +334,7 @@
1.46 + L(handletail32):
1.47 + clrrwi. rALIGN, rLEN, 5
1.48 + b L(nondcbz)
1.49 ++#endif /* ! BROKEN_PPC_8xx_CPU15 */
1.50 +
1.51 + END (BP_SYM (memset))
1.52 + libc_hidden_builtin_def (memset)