1.1 --- a/patches/glibc/2.7/290-powerpc-8xx-CPU15-errata.patch Thu Oct 23 21:12:29 2008 +0000
1.2 +++ b/patches/glibc/2.7/290-powerpc-8xx-CPU15-errata.patch Mon Jan 26 22:43:08 2009 +0000
1.3 @@ -7,7 +7,7 @@
1.4 dcbX bug). The source of the problem is sysdeps/powerpc/power3/memset.S
1.5
1.6 --- glibc-2.7/sysdeps/powerpc/powerpc32/memset.S 2007-03-26 13:09:07.000000000 -0700
1.7 -+++ glibc-2.7/sysdeps/powerpc/powerpc32/memset.S.new 2008-10-23 12:20:04.000000000 -0700
1.8 ++++ glibc-2.7/sysdeps/powerpc/powerpc32/memset.S.new 2008-10-23 20:28:52.000000000 -0700
1.9 @@ -112,11 +112,13 @@
1.10 clrrwi. rALIGN, rLEN, 5
1.11 mtcrf 0x01, rLEN /* 40th instruction from .align */
1.12 @@ -22,7 +22,23 @@
1.13
1.14 /* Store blocks of 32-bytes (256-bits) starting on a 32-byte boundary.
1.15 Can't assume that rCHR is zero or that the cache line size is either
1.16 -@@ -248,6 +250,7 @@
1.17 +@@ -158,6 +160,7 @@
1.18 + add rMEMP, rMEMP, rALIGN
1.19 + b L(medium_tail2) /* 72nd instruction from .align */
1.20 +
1.21 ++#ifndef BROKEN_PPC_8xx_CPU15
1.22 + .align 5
1.23 + nop
1.24 + /* Clear cache lines of memory in 128-byte chunks.
1.25 +@@ -191,6 +194,7 @@
1.26 + bdnz L(zloop)
1.27 + beqlr cr5
1.28 + b L(medium_tail2)
1.29 ++#endif /* ! BROKEN_PPC_8xx_CPU15 */
1.30 +
1.31 + .align 5
1.32 + L(small):
1.33 +@@ -248,6 +252,7 @@
1.34 stw rCHR, -8(rMEMP)
1.35 blr
1.36
1.37 @@ -30,7 +46,7 @@
1.38 L(checklinesize):
1.39 #ifdef SHARED
1.40 mflr rTMP
1.41 -@@ -329,6 +332,7 @@
1.42 +@@ -329,6 +334,7 @@
1.43 L(handletail32):
1.44 clrrwi. rALIGN, rLEN, 5
1.45 b L(nondcbz)