1.1 --- /dev/null Thu Jan 01 00:00:00 1970 +0000
1.2 +++ b/patches/gcc/3.3.3/pr13260-fix-3.3.3.patch Sat Feb 24 11:00:05 2007 +0000
1.3 @@ -0,0 +1,246 @@
1.4 +Date: Fri, 06 Feb 2004 12:35:58 +0900
1.5 +From: SUGIOKA Toshinobu <sugioka@itonet.co.jp>
1.6 +Subject: [linux-sh:03150] Re: gcc 3.3 optimisation problem
1.7 +To: linux-sh@m17n.org
1.8 +Message-Id: <4.2.0.58.J.20040206122503.04fe3058@router.itonet.co.jp>
1.9 +List-Help: <mailto:linux-sh-ctl@m17n.org?body=help>
1.10 +List-Id: linux-sh.m17n.org
1.11 +
1.12 +At 19:40 03/12/01 +0000, Stuart Menefy <stuart.menefy@st.com> wrote:
1.13 +>On Sat, 29 Nov 2003 20:19:08 +0900 kkojima@rr.iij4u.or.jp wrote:
1.14 +>
1.15 +>> Dan Kegel <dank@kegel.com> wrote:
1.16 +>> > Stuart Menefy wrote:
1.17 +>> >> I've just been trying to put together a gcc 3.3.2 based toolchain, and
1.18 +>> >> appear to be hitting a gcc optimisation bug. I was just wondering if
1.19 +>> >> anyone else had seen anything similar.
1.20 +>> >>
1.21 +>> >> The problem is seen when building the kernel, in the function
1.22 +>> >> root_nfs_parse_addr(). I've extracted this into a small stand alone
1.23 +>> >> program which demonstrates the problem.
1.24 +>> >
1.25 +>> > Excellent work. I haven't seen anything like this (doesn't mean much)
1.26 +>> > and the sh-specific optimization bugs in the gcc bug database don't look
1.27 +>> > similar. I think you should submit this as a bug report at
1.28 +>> > http://gcc.gnu.org/bugzilla/
1.29 +>> > It would be good if you could make your test case call abort() if
1.30 +>> > the problem is present, so the test case can be automated.
1.31 +>>
1.32 +>> Indeed. It'd be very nice to create a gcc PR for this issue.
1.33 +>
1.34 +>OK, I've done that. PR 13260.
1.35 +
1.36 +PR 13260 was fixed by amylaar@gcc.gnu.org at 2003-12-04 20:10:29 on mainline(gcc-3.4).
1.37 +I have back-ported that patch to gcc-3.3.3 and seems fine for me.
1.38 +
1.39 + * sh-protos.h (sh_expand_t_scc): Declare.
1.40 + * sh.h (PREDICATE_CODES): Add cmpsi_operand.
1.41 + * sh.c (cmpsi_operand, sh_expand_t_scc): New functions.
1.42 + * sh.md (cmpsi): Use cmpsi_operand. If T_REG is compared to
1.43 + something that is not a CONST_INT, copy it into a pseudo register.
1.44 + (subc): Fix description of new T value.
1.45 + (slt, sgt, sge, sgtu): Don't clobber T after rtl generation is over.
1.46 + (sltu, sleu, sgeu): Likewise.
1.47 + (seq, sne): Likewise. Use sh_expand_t_scc.
1.48 +
1.49 +diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh-protos.h gcc-3.3-20040126/gcc/config/sh/sh-protos.h
1.50 +--- gcc-3.3-20040126-1/gcc/config/sh/sh-protos.h Tue Jan 13 02:03:24 2004
1.51 ++++ gcc-3.3-20040126/gcc/config/sh/sh-protos.h Fri Jan 30 17:54:04 2004
1.52 +@@ -102,6 +102,7 @@
1.53 + extern int sh_can_redirect_branch PARAMS ((rtx, rtx));
1.54 + extern void sh_expand_unop_v2sf PARAMS ((enum rtx_code, rtx, rtx));
1.55 + extern void sh_expand_binop_v2sf PARAMS ((enum rtx_code, rtx, rtx, rtx));
1.56 ++extern int sh_expand_t_scc (enum rtx_code code, rtx target);
1.57 + #ifdef TREE_CODE
1.58 + extern void sh_va_start PARAMS ((tree, rtx));
1.59 + extern rtx sh_va_arg PARAMS ((tree, tree));
1.60 +diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.c gcc-3.3-20040126/gcc/config/sh/sh.c
1.61 +--- gcc-3.3-20040126-1/gcc/config/sh/sh.c Thu Jan 15 03:11:36 2004
1.62 ++++ gcc-3.3-20040126/gcc/config/sh/sh.c Fri Jan 30 17:53:58 2004
1.63 +@@ -7870,6 +7870,15 @@
1.64 + return register_operand (op, mode);
1.65 + }
1.66 +
1.67 ++int
1.68 ++cmpsi_operand (rtx op, enum machine_mode mode)
1.69 ++{
1.70 ++ if (GET_CODE (op) == REG && REGNO (op) == T_REG
1.71 ++ && GET_MODE (op) == SImode)
1.72 ++ return 1;
1.73 ++ return arith_operand (op, mode);
1.74 ++}
1.75 ++
1.76 + /* INSN is an sfunc; return the rtx that describes the address used. */
1.77 + static rtx
1.78 + extract_sfunc_addr (rtx insn)
1.79 +@@ -7917,4 +7926,33 @@
1.80 + abort ();
1.81 + }
1.82 +
1.83 ++int
1.84 ++sh_expand_t_scc (enum rtx_code code, rtx target)
1.85 ++{
1.86 ++ rtx result = target;
1.87 ++ HOST_WIDE_INT val;
1.88 ++
1.89 ++ if (GET_CODE (sh_compare_op0) != REG || REGNO (sh_compare_op0) != T_REG
1.90 ++ || GET_CODE (sh_compare_op1) != CONST_INT)
1.91 ++ return 0;
1.92 ++ if (GET_CODE (result) != REG)
1.93 ++ result = gen_reg_rtx (SImode);
1.94 ++ val = INTVAL (sh_compare_op1);
1.95 ++ if ((code == EQ && val == 1) || (code == NE && val == 0))
1.96 ++ emit_insn (gen_movt (result));
1.97 ++ else if ((code == EQ && val == 0) || (code == NE && val == 1))
1.98 ++ {
1.99 ++ emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
1.100 ++ emit_insn (gen_subc (result, result, result));
1.101 ++ emit_insn (gen_addsi3 (result, result, GEN_INT (1)));
1.102 ++ }
1.103 ++ else if (code == EQ || code == NE)
1.104 ++ emit_insn (gen_move_insn (result, GEN_INT (code == NE)));
1.105 ++ else
1.106 ++ return 0;
1.107 ++ if (result != target)
1.108 ++ emit_move_insn (target, result);
1.109 ++ return 1;
1.110 ++}
1.111 ++
1.112 + #include "gt-sh.h"
1.113 +diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.h gcc-3.3-20040126/gcc/config/sh/sh.h
1.114 +--- gcc-3.3-20040126-1/gcc/config/sh/sh.h Wed Apr 16 02:06:09 2003
1.115 ++++ gcc-3.3-20040126/gcc/config/sh/sh.h Fri Jan 30 17:53:51 2004
1.116 +@@ -3231,6 +3231,7 @@
1.117 + {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_VECTOR}}, \
1.118 + {"binary_float_operator", {PLUS, MINUS, MULT, DIV}}, \
1.119 + {"binary_logical_operator", {AND, IOR, XOR}}, \
1.120 ++ {"cmpsi_operand", {SUBREG, REG, CONST_INT}}, \
1.121 + {"commutative_float_operator", {PLUS, MULT}}, \
1.122 + {"equality_comparison_operator", {EQ,NE}}, \
1.123 + {"extend_reg_operand", {SUBREG, REG, TRUNCATE}}, \
1.124 +diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.md gcc-3.3-20040126/gcc/config/sh/sh.md
1.125 +--- gcc-3.3-20040126-1/gcc/config/sh/sh.md Tue Jan 13 02:03:25 2004
1.126 ++++ gcc-3.3-20040126/gcc/config/sh/sh.md Fri Jan 30 17:54:20 2004
1.127 +@@ -685,11 +685,14 @@
1.128 +
1.129 + (define_expand "cmpsi"
1.130 + [(set (reg:SI T_REG)
1.131 +- (compare (match_operand:SI 0 "arith_operand" "")
1.132 ++ (compare (match_operand:SI 0 "cmpsi_operand" "")
1.133 + (match_operand:SI 1 "arith_operand" "")))]
1.134 + "TARGET_SH1"
1.135 + "
1.136 + {
1.137 ++ if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == T_REG
1.138 ++ && GET_CODE (operands[1]) != CONST_INT)
1.139 ++ operands[0] = copy_to_mode_reg (SImode, operands[0]);
1.140 + sh_compare_op0 = operands[0];
1.141 + sh_compare_op1 = operands[1];
1.142 + DONE;
1.143 +@@ -1147,7 +1150,9 @@
1.144 + (match_operand:SI 2 "arith_reg_operand" "r"))
1.145 + (reg:SI T_REG)))
1.146 + (set (reg:SI T_REG)
1.147 +- (gtu:SI (minus:SI (match_dup 1) (match_dup 2)) (match_dup 1)))]
1.148 ++ (gtu:SI (minus:SI (minus:SI (match_dup 1) (match_dup 2))
1.149 ++ (reg:SI T_REG))
1.150 ++ (match_dup 1)))]
1.151 + "TARGET_SH1"
1.152 + "subc %2,%0"
1.153 + [(set_attr "type" "arith")])
1.154 +@@ -7223,6 +7228,10 @@
1.155 + }
1.156 + DONE;
1.157 + }
1.158 ++ if (sh_expand_t_scc (EQ, operands[0]))
1.159 ++ DONE;
1.160 ++ if (! rtx_equal_function_value_matters)
1.161 ++ FAIL;
1.162 + operands[1] = prepare_scc_operands (EQ);
1.163 + }")
1.164 +
1.165 +@@ -7269,6 +7278,8 @@
1.166 + }
1.167 + DONE;
1.168 + }
1.169 ++ if (! rtx_equal_function_value_matters)
1.170 ++ FAIL;
1.171 + operands[1] = prepare_scc_operands (LT);
1.172 + }")
1.173 +
1.174 +@@ -7371,6 +7382,8 @@
1.175 + }
1.176 + DONE;
1.177 + }
1.178 ++ if (! rtx_equal_function_value_matters)
1.179 ++ FAIL;
1.180 + operands[1] = prepare_scc_operands (GT);
1.181 + }")
1.182 +
1.183 +@@ -7423,6 +7436,8 @@
1.184 + DONE;
1.185 + }
1.186 +
1.187 ++ if (! rtx_equal_function_value_matters)
1.188 ++ FAIL;
1.189 + if (GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT)
1.190 + {
1.191 + if (TARGET_IEEE)
1.192 +@@ -7462,6 +7477,8 @@
1.193 + sh_compare_op0, sh_compare_op1));
1.194 + DONE;
1.195 + }
1.196 ++ if (! rtx_equal_function_value_matters)
1.197 ++ FAIL;
1.198 + operands[1] = prepare_scc_operands (GTU);
1.199 + }")
1.200 +
1.201 +@@ -7486,6 +7503,8 @@
1.202 + sh_compare_op1, sh_compare_op0));
1.203 + DONE;
1.204 + }
1.205 ++ if (! rtx_equal_function_value_matters)
1.206 ++ FAIL;
1.207 + operands[1] = prepare_scc_operands (LTU);
1.208 + }")
1.209 +
1.210 +@@ -7515,6 +7534,8 @@
1.211 +
1.212 + DONE;
1.213 + }
1.214 ++ if (! rtx_equal_function_value_matters)
1.215 ++ FAIL;
1.216 + operands[1] = prepare_scc_operands (LEU);
1.217 + }")
1.218 +
1.219 +@@ -7545,6 +7566,8 @@
1.220 + DONE;
1.221 + }
1.222 +
1.223 ++ if (! rtx_equal_function_value_matters)
1.224 ++ FAIL;
1.225 + operands[1] = prepare_scc_operands (GEU);
1.226 + }")
1.227 +
1.228 +@@ -7592,8 +7615,12 @@
1.229 + DONE;
1.230 + }
1.231 +
1.232 +- operands[1] = prepare_scc_operands (EQ);
1.233 +- operands[2] = gen_reg_rtx (SImode);
1.234 ++ if (sh_expand_t_scc (NE, operands[0]))
1.235 ++ DONE;
1.236 ++ if (! rtx_equal_function_value_matters)
1.237 ++ FAIL;
1.238 ++ operands[1] = prepare_scc_operands (EQ);
1.239 ++ operands[2] = gen_reg_rtx (SImode);
1.240 + }")
1.241 +
1.242 + (define_expand "sunordered"
1.243 +
1.244 +----
1.245 +SUGIOKA Toshinobu
1.246 +
1.247 +
1.248 +
1.249 +