Update the patchset for MPFR 2.4.1 from upstream.
-------- diffstat follows --------
/trunk/patches/mpfr/2.4.1/120-cast-to-void-ptr.patch | 25 25 0 0 ++++++++++++
/trunk/patches/mpfr/2.4.1/130-vasprintf-mp_limb_t.patch | 45 45 0 0 ++++++++++++++++++++++
/trunk/patches/mpfr/2.4.1/140-zeta_ui-shift.patch | 47 47 0 0 +++++++++++++++++++++++
3 files changed, 117 insertions(+)
1 reporter_name="Nate CASE"
2 reporter_url="http://sourceware.org/ml/crossgcc/2008-10/msg00016.html"
3 reporter_comment="This is a sample config file for Freescale e500v2 processors (e.g.,
4 MPC8548, MPC8572). It uses eglibc (for e500/SPE patches) and a recent
5 gcc (4.3.1, for e500v2 DPFP support) and will generate appropriate
6 dual-precision floating point instructions by default.
8 Note: If building a Linux kernel with this toolchain, you will want to
9 make sure -mno-spe AND -mspe=no are passed to gcc to prevent SPE
10 ABI/instructions from getting into the kernel (which is currently
11 unsupported). At this time, the kernel build system only passes
12 -mno-spe by default (this should be fixed soon hopefully)."