patches/gcc/3.4.6/601-gcc34-arm-ldm.patch
author "Yann E. MORIN" <yann.morin.1998@anciens.enib.fr>
Sat Apr 26 21:31:05 2008 +0000 (2008-04-26)
changeset 454 372b2f397baa
permissions -rw-r--r--
Configure tsocks with a simple heuristic.

Consider the proxy has to be in a 'local' network. It means it is directly
reachable by the local machine, even if the local machine has to hop through
one or more gates to reach the proxy (often the case in enterprise networks
where class A 10.0.0.0/8 is in fact sub-divided into smaller networks, each
one of them in a different location, eg. 10.1.0.0/16 in a place, while
10.2.0.0/16 would be on the other side of the world). Not being in the same
subnet does not mean the proxy is not available.

So we will build a mask with at most high bits set, which defines a network
that has both the local machine and the proxy. Because a machine may have
more than one interface, build a mask for each of them, removing 127.0.0.1
which is added automagically by tsocks, and removing duplicate masks.

If all of this does not work, then it means the local machine can NOT in fact
reach the proxy, which in turn means the user mis-configured something (most
probably a typo...).

/trunk/scripts/crosstool.sh | 61 52 9 0 +++++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 52 insertions(+), 9 deletions(-)
     1 diff -durN gcc-3.4.6.orig/gcc/config/arm/arm.c gcc-3.4.6/gcc/config/arm/arm.c
     2 --- gcc-3.4.6.orig/gcc/config/arm/arm.c	2007-08-15 22:56:20.000000000 +0200
     3 +++ gcc-3.4.6/gcc/config/arm/arm.c	2007-08-15 22:56:20.000000000 +0200
     4 @@ -8524,6 +8524,26 @@
     5    return_used_this_function = 0;  
     6  }
     7  
     8 +/* Return the number (counting from 0) of
     9 +   the least significant set bit in MASK.  */
    10 +
    11 +#ifdef __GNUC__
    12 +inline
    13 +#endif
    14 +static int
    15 +number_of_first_bit_set (mask)
    16 +     int mask;
    17 +{
    18 +  int bit;
    19 +
    20 +  for (bit = 0;
    21 +       (mask & (1 << bit)) == 0;
    22 +       ++bit)
    23 +    continue;
    24 +
    25 +  return bit;
    26 +}
    27 +
    28  const char *
    29  arm_output_epilogue (rtx sibling)
    30  {
    31 @@ -8757,27 +8777,47 @@
    32  	  saved_regs_mask |=   (1 << PC_REGNUM);
    33  	}
    34  
    35 -      /* Load the registers off the stack.  If we only have one register
    36 -	 to load use the LDR instruction - it is faster.  */
    37 -      if (saved_regs_mask == (1 << LR_REGNUM))
    38 -	{
    39 -	  /* The exception handler ignores the LR, so we do
    40 -	     not really need to load it off the stack.  */
    41 -	  if (eh_ofs)
    42 -	    asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
    43 -	  else
    44 -	    asm_fprintf (f, "\tldr\t%r, [%r], #4\n", LR_REGNUM, SP_REGNUM);
    45 -	}
    46 -      else if (saved_regs_mask)
    47 +      if (saved_regs_mask)
    48  	{
    49 -	  if (saved_regs_mask & (1 << SP_REGNUM))
    50 -	    /* Note - write back to the stack register is not enabled
    51 -	       (ie "ldmfd sp!...").  We know that the stack pointer is
    52 -	       in the list of registers and if we add writeback the
    53 -	       instruction becomes UNPREDICTABLE.  */
    54 -	    print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
    55 +	  /* Load the registers off the stack.  If we only have one register
    56 +	     to load use the LDR instruction - it is faster.  */
    57 +	  if (bit_count (saved_regs_mask) == 1)
    58 +	    {
    59 +	      int reg = number_of_first_bit_set (saved_regs_mask);
    60 +
    61 +	      switch (reg)
    62 +		{
    63 +		case SP_REGNUM:
    64 +		  /* Mustn't use base writeback when loading SP.  */
    65 +		  asm_fprintf (f, "\tldr\t%r, [%r]\n", SP_REGNUM, SP_REGNUM);
    66 +		  break;
    67 +		  
    68 +		case LR_REGNUM:
    69 +		  if (eh_ofs)
    70 +		    {
    71 +		      /* The exception handler ignores the LR, so we do
    72 +			 not really need to load it off the stack.  */
    73 +		      asm_fprintf (f, "\tadd\t%r, %r, #4\n", SP_REGNUM, SP_REGNUM);
    74 +		      break;
    75 +		    }
    76 +		  /* else fall through */
    77 +		  
    78 +		default:
    79 +		  asm_fprintf (f, "\tldr\t%r, [%r], #4\n", reg, SP_REGNUM);
    80 +		  break;
    81 +		}
    82 +	    }
    83  	  else
    84 -	    print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
    85 +	    {
    86 +	      if (saved_regs_mask & (1 << SP_REGNUM))
    87 +		/* Note - write back to the stack register is not enabled
    88 +		   (ie "ldmfd sp!...").  We know that the stack pointer is
    89 +		   in the list of registers and if we add writeback the
    90 +		   instruction becomes UNPREDICTABLE.  */
    91 +		print_multi_reg (f, "ldmfd\t%r", SP_REGNUM, saved_regs_mask);
    92 +	      else
    93 +		print_multi_reg (f, "ldmfd\t%r!", SP_REGNUM, saved_regs_mask);
    94 +	    }
    95  	}
    96  
    97        if (current_function_pretend_args_size)
    98 @@ -11405,22 +11445,6 @@
    99      }
   100  }
   101  
   102 -/* Return the number (counting from 0) of
   103 -   the least significant set bit in MASK.  */
   104 -
   105 -inline static int
   106 -number_of_first_bit_set (int mask)
   107 -{
   108 -  int bit;
   109 -
   110 -  for (bit = 0;
   111 -       (mask & (1 << bit)) == 0;
   112 -       ++bit)
   113 -    continue;
   114 -
   115 -  return bit;
   116 -}
   117 -
   118  /* Generate code to return from a thumb function.
   119     If 'reg_containing_return_addr' is -1, then the return address is
   120     actually on the stack, at the stack pointer.  */