1 http://yann.poupet.free.fr/ep93xx/
2 Add support for the Maverick Crunch FPU on Cirrus EP93XX processor series
4 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/bits/endian.h glibc-2.13/glibc-ports-2.13/sysdeps/arm/bits/endian.h
5 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/bits/endian.h 2009-05-16 10:36:20.000000000 +0200
6 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/bits/endian.h 2009-11-13 00:51:22.000000000 +0100
8 /* FPA floating point units are always big-endian, irrespective of the
9 CPU endianness. VFP floating point units use the same endianness
10 as the rest of the system. */
12 +#if defined __VFP_FP__ || defined __MAVERICK__
13 #define __FLOAT_WORD_ORDER __BYTE_ORDER
15 #define __FLOAT_WORD_ORDER __BIG_ENDIAN
16 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/__longjmp.S glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/__longjmp.S
17 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/__longjmp.S 2009-05-16 10:36:20.000000000 +0200
18 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/__longjmp.S 2009-11-13 00:51:22.000000000 +0100
20 movs r0, r1 /* get the return value in place */
21 moveq r0, #1 /* can't let setjmp() return zero! */
24 + cfldrd mvd4, [ip], #8
26 + cfldrd mvd5, [ip], #8
28 + cfldrd mvd6, [ip], #8
30 + cfldrd mvd7, [ip], #8
32 + cfldrd mvd8, [ip], #8
34 + cfldrd mvd9, [ip], #8
36 + cfldrd mvd10, [ip], #8
38 + cfldrd mvd11, [ip], #8
40 + cfldrd mvd12, [ip], #8
42 + cfldrd mvd13, [ip], #8
44 + cfldrd mvd14, [ip], #8
46 + cfldrd mvd15, [ip], #8
48 lfmfd f4, 4, [ip] ! /* load the floating point regs */
51 LOADREGS(ia, ip, {v1-v6, sl, fp, sp, pc})
53 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/bits/fenv.h glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/bits/fenv.h
54 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/bits/fenv.h 2009-05-16 10:36:20.000000000 +0200
55 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/bits/fenv.h 2009-11-13 00:51:22.000000000 +0100
57 # error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
60 +#if defined(__MAVERICK__)
62 +/* Define bits representing exceptions in the FPU status word. */
66 +#define FE_INVALID FE_INVALID
68 +#define FE_OVERFLOW FE_OVERFLOW
70 +#define FE_UNDERFLOW FE_UNDERFLOW
72 +#define FE_INEXACT FE_INEXACT
75 +/* Amount to shift by to convert an exception to a mask bit. */
76 +#define FE_EXCEPT_SHIFT 5
78 +/* All supported exceptions. */
79 +#define FE_ALL_EXCEPT \
80 + (FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
82 +/* IEEE rounding modes. */
86 +#define FE_TONEAREST FE_TONEAREST
87 + FE_TOWARDZERO = 0x400,
88 +#define FE_TOWARDZERO FE_TOWARDZERO
89 + FE_DOWNWARD = 0x800,
90 +#define FE_DOWNWARD FE_DOWNWARD
92 +#define FE_UPWARD FE_UPWARD
95 +#define FE_ROUND_MASK (FE_UPWARD)
99 /* Define bits representing exceptions in the FPU status word. */
103 modes exist, but you have to encode them in the actual instruction. */
104 #define FE_TONEAREST 0
108 /* Type representing exception flags. */
109 typedef unsigned long int fexcept_t;
111 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/bits/setjmp.h glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/bits/setjmp.h
112 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/bits/setjmp.h 2009-05-16 10:36:20.000000000 +0200
113 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/bits/setjmp.h 2009-11-13 00:51:22.000000000 +0100
116 /* Jump buffer contains v1-v6, sl, fp, sp and pc. Other registers are not
119 +typedef int __jmp_buf[34];
121 typedef int __jmp_buf[22];
126 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/fegetround.c glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/fegetround.c
127 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/fegetround.c 2009-05-16 10:36:20.000000000 +0200
128 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/fegetround.c 2009-11-13 00:51:22.000000000 +0100
133 +#include <fpu_control.h>
138 +#if defined(__MAVERICK__)
140 + unsigned long temp;
143 + return temp & FE_ROUND_MASK;
147 return FE_TONEAREST; /* Easy. :-) */
151 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/fesetround.c glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/fesetround.c
152 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/fesetround.c 2009-05-16 10:36:20.000000000 +0200
153 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/fesetround.c 2009-11-13 00:51:22.000000000 +0100
158 +#include <fpu_control.h>
161 fesetround (int round)
163 +#if defined(__MAVERICK__)
164 + unsigned long temp;
166 + if (round & ~FE_ROUND_MASK)
170 + temp = (temp & ~FE_ROUND_MASK) | round;
176 /* We only support FE_TONEAREST, so there is no need for any work. */
177 return (round == FE_TONEAREST)?0:1;
182 libm_hidden_def (fesetround)
183 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/fpu_control.h glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/fpu_control.h
184 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/fpu_control.h 2009-05-16 10:36:20.000000000 +0200
185 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/fpu_control.h 2009-11-13 00:51:22.000000000 +0100
187 /* FPU control word definitions. ARM version.
188 - Copyright (C) 1996, 1997, 1998, 2000 Free Software Foundation, Inc.
189 + Copyright (C) 1996, 1997, 1998, 2000, 2005
190 + Free Software Foundation, Inc.
191 This file is part of the GNU C Library.
193 The GNU C Library is free software; you can redistribute it and/or
195 #ifndef _FPU_CONTROL_H
196 #define _FPU_CONTROL_H
198 +#if defined(__MAVERICK__)
200 +/* DSPSC register: (from EP9312 User's Guide)
202 + * bits 31..29 - DAID
203 + * bits 28..26 - HVID
204 + * bits 25..24 - RSVD
209 + * bits 19..18 - SAT
210 + * bits 17..16 - FCC
216 + * bits 9..5 - IXE, UFE, OFE, RSVD, IOE
217 + * bits 4..0 - IX, UF, OF, RSVD, IO
220 +/* masking of interrupts */
221 +#define _FPU_MASK_IM (1 << 5) /* invalid operation */
222 +#define _FPU_MASK_ZM 0 /* divide by zero */
223 +#define _FPU_MASK_OM (1 << 7) /* overflow */
224 +#define _FPU_MASK_UM (1 << 8) /* underflow */
225 +#define _FPU_MASK_PM (1 << 9) /* inexact */
226 +#define _FPU_MASK_DM 0 /* denormalized operation */
228 +#define _FPU_RESERVED 0xfffff000 /* These bits are reserved. */
230 +#define _FPU_DEFAULT 0x00b00000 /* Default value. */
231 +#define _FPU_IEEE 0x00b003a0 /* Default + exceptions enabled. */
233 +/* Type of the control word. */
234 +typedef unsigned int fpu_control_t;
236 +/* Macros for accessing the hardware control word. */
237 +#define _FPU_GETCW(cw) ({ \
238 + register int __t1, __t2; \
240 + __asm__ volatile ( \
241 + "cfmvr64l %1, mvdx0\n\t" \
242 + "cfmvr64h %2, mvdx0\n\t" \
243 + "cfmv32sc mvdx0, dspsc\n\t" \
244 + "cfmvr64l %0, mvdx0\n\t" \
245 + "cfmv64lr mvdx0, %1\n\t" \
246 + "cfmv64hr mvdx0, %2" \
247 + : "=r" (cw), "=r" (__t1), "=r" (__t2) \
251 +#define _FPU_SETCW(cw) ({ \
252 + register int __t0, __t1, __t2; \
254 + __asm__ volatile ( \
255 + "cfmvr64l %1, mvdx0\n\t" \
256 + "cfmvr64h %2, mvdx0\n\t" \
257 + "cfmv64lr mvdx0, %0\n\t" \
258 + "cfmvsc32 dspsc, mvdx0\n\t" \
259 + "cfmv64lr mvdx0, %1\n\t" \
260 + "cfmv64hr mvdx0, %2" \
261 + : "=r" (__t0), "=r" (__t1), "=r" (__t2) \
266 +/* Default control word set at startup. */
267 +extern fpu_control_t __fpu_control;
271 /* We have a slight terminology confusion here. On the ARM, the register
272 * we're interested in is actually the FPU status word - the FPU control
273 * word is something different (which is implementation-defined and only
275 /* Default control word set at startup. */
276 extern fpu_control_t __fpu_control;
280 #endif /* _FPU_CONTROL_H */
281 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/jmpbuf-offsets.h glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/jmpbuf-offsets.h
282 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/jmpbuf-offsets.h 2009-05-16 10:36:20.000000000 +0200
283 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/jmpbuf-offsets.h 2009-11-13 00:51:22.000000000 +0100
285 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
289 +#define __JMP_BUF_SP 32
291 #define __JMP_BUF_SP 20
293 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/setjmp.S glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/setjmp.S
294 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/fpu/setjmp.S 2009-05-16 10:36:20.000000000 +0200
295 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/fpu/setjmp.S 2009-11-13 00:51:22.000000000 +0100
301 + cfstrd mvd4, [r0], #8
303 + cfstrd mvd5, [r0], #8
305 + cfstrd mvd6, [r0], #8
307 + cfstrd mvd7, [r0], #8
309 + cfstrd mvd8, [r0], #8
311 + cfstrd mvd9, [r0], #8
313 + cfstrd mvd10, [r0], #8
315 + cfstrd mvd11, [r0], #8
317 + cfstrd mvd12, [r0], #8
319 + cfstrd mvd13, [r0], #8
321 + cfstrd mvd14, [r0], #8
323 + cfstrd mvd15, [r0], #8
327 stmia r0, {v1-v6, sl, fp, sp, lr}
329 /* Restore pointer to jmp_buf */
336 /* Make a tail call to __sigjmp_save; it takes the same args. */
337 B PLTJMP(C_SYMBOL_NAME(__sigjmp_save))
338 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/gccframe.h glibc-2.13/glibc-ports-2.13/sysdeps/arm/gccframe.h
339 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/gccframe.h 2009-05-16 10:36:20.000000000 +0200
340 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/gccframe.h 2009-11-13 00:51:22.000000000 +0100
342 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
346 +#define FIRST_PSEUDO_REGISTER 43
348 #define FIRST_PSEUDO_REGISTER 27
351 #include <sysdeps/generic/gccframe.h>
352 diff -durN glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/gmp-mparam.h glibc-2.13/glibc-ports-2.13/sysdeps/arm/gmp-mparam.h
353 --- glibc-2.13.orig/glibc-ports-2.13/sysdeps/arm/gmp-mparam.h 2009-05-16 10:36:20.000000000 +0200
354 +++ glibc-2.13/glibc-ports-2.13/sysdeps/arm/gmp-mparam.h 2009-11-13 00:51:22.000000000 +0100
356 #if defined(__ARMEB__)
357 # define IEEE_DOUBLE_MIXED_ENDIAN 0
358 # define IEEE_DOUBLE_BIG_ENDIAN 1
359 -#elif defined(__VFP_FP__)
360 +#elif defined(__VFP_FP__) || defined(__MAVERICK__)
361 # define IEEE_DOUBLE_MIXED_ENDIAN 0
362 # define IEEE_DOUBLE_BIG_ENDIAN 0
364 diff -durN glibc-2.13.orig/ports/sysdeps/arm/bits/endian.h glibc-2.13/ports/sysdeps/arm/bits/endian.h
365 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/__longjmp.S glibc-2.13/ports/sysdeps/arm/fpu/__longjmp.S
366 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/bits/fenv.h glibc-2.13/ports/sysdeps/arm/fpu/bits/fenv.h
367 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/bits/setjmp.h glibc-2.13/ports/sysdeps/arm/fpu/bits/setjmp.h
368 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/fegetround.c glibc-2.13/ports/sysdeps/arm/fpu/fegetround.c
369 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/fesetround.c glibc-2.13/ports/sysdeps/arm/fpu/fesetround.c
370 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/fpu_control.h glibc-2.13/ports/sysdeps/arm/fpu/fpu_control.h
371 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/jmpbuf-offsets.h glibc-2.13/ports/sysdeps/arm/fpu/jmpbuf-offsets.h
372 diff -durN glibc-2.13.orig/ports/sysdeps/arm/fpu/setjmp.S glibc-2.13/ports/sysdeps/arm/fpu/setjmp.S
373 diff -durN glibc-2.13.orig/ports/sysdeps/arm/gccframe.h glibc-2.13/ports/sysdeps/arm/gccframe.h
374 diff -durN glibc-2.13.orig/ports/sysdeps/arm/gmp-mparam.h glibc-2.13/ports/sysdeps/arm/gmp-mparam.h