Sample config for e500v2 toolchain

On Tuesday 14 October 2008 17:05:31 Nate Case wrote:
> This is a sample config file for Freescale e500v2 processors (e.g.,
> MPC8548, MPC8572). It uses eglibc (for e500/SPE patches) and a recent
> gcc (4.3.1, for e500v2 DPFP support) and will generate appropriate
> dual-precision floating point instructions by default.
>
> Note: If building a Linux kernel with this toolchain, you will want to
> make sure -mno-spe AND -mspe=no are passed to gcc to prevent SPE
> ABI/instructions from getting into the kernel (which is currently
> unsupported). At this time, the kernel build system only passes
> -mno-spe by default (this should be fixed soon hopefully).
>
> A binutils snapshot is used to fix a bug present in 2.18 preventing
> U-Boot from being compiled (CodeSourcery issue #2297: internal.h
> (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with segments at the end of
> memory).

Obsoletes the powerpc-unknown-linux-gnuspe sample, so remove it.

/trunk/samples/powerpc-e500v2-linux-gnuspe/crosstool.config | 307 307 0 0 +++++++++++++++++++
1 file changed, 307 insertions(+)

 Original patch from H.J. Lu, as reported there:

 http://www.nabble.com/PATCH:-Use-short-for-fnstsw-td14775171.html

 fnstsw stores 16bit into %ax. The upper 16bit of %eax is unchanged.

 The new assembler (binutils-2.18.50.0.4 and up) will disallow "fnstsw %eax".

 diff -dur glibc-2.6.1.orig/sysdeps/i386/fpu/ftestexcept.c glibc-2.6.1/sysdeps/i386/fpu/ftestexcept.c

 --- glibc-2.6.1.orig/sysdeps/i386/fpu/ftestexcept.c	2004-03-05 11:14:48.000000000 +0100

 +++ glibc-2.6.1/sysdeps/i386/fpu/ftestexcept.c	2008-06-24 10:56:14.000000000 +0200

 @@ -26,7 +26,7 @@

  int

  fetestexcept (int excepts)

  {

 -  int temp;

 +  short temp;

    int xtemp = 0;

    /* Get current exceptions.  */