Robert P. J. DAY says:
According to Mike Frysinger, this patch was removed from Gentoo in the
2.3.x series and didn't seem to cause any adverse effects. So toss it
from the patch directories for glibc 2.5 and up.
1 From http://gcc.gnu.org/ml/gcc-patches/2003-11/msg00832.html, by
2 Richard Earnshaw. Fixes http://gcc.gnu.org/PR22528
4 --- gcc-3.3.4/gcc/config/arm/arm.md.orig 2004-03-30 22:43:44.000000000 +0200
5 +++ gcc-3.3.4/gcc/config/arm/arm.md 2005-08-15 12:21:55.000000000 +0200
8 (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
10 - (set (match_dup 4) (subreg:QI (match_dup 2) 0))] ;explicit subreg safe
11 + (set (match_dup 4) (match_dup 5))]
16 operands[1] = adjust_address (operands[1], QImode, 0);
17 operands[3] = gen_lowpart (QImode, operands[0]);
18 operands[0] = gen_lowpart (SImode, operands[0]);
19 - operands[2] = gen_reg_rtx (SImode);
20 + operands[2] = gen_reg_rtx (SImode);
21 + operands[5] = gen_lowpart (QImode, operands[2]);
26 [(set (match_dup 4) (match_dup 3))
28 (ashiftrt:SI (match_operand 0 "" "") (const_int 8)))
29 - (set (match_operand 1 "" "") (subreg:QI (match_dup 2) 3))]
30 + (set (match_operand 1 "" "") (match_dup 5))]
34 @@ -4316,13 +4317,14 @@
35 operands[3] = gen_lowpart (QImode, operands[0]);
36 operands[0] = gen_lowpart (SImode, operands[0]);
37 operands[2] = gen_reg_rtx (SImode);
38 + operands[5] = gen_lowpart (QImode, operands[2]);
42 ;; Subroutine to store a half word integer constant into memory.
43 (define_expand "storeinthi"
44 [(set (match_operand 0 "" "")
45 - (subreg:QI (match_operand 1 "" "") 0))
46 + (match_operand 1 "" ""))
47 (set (match_dup 3) (match_dup 2))]
51 operands[3] = adjust_address (op0, QImode, 1);
52 operands[0] = adjust_address (operands[0], QImode, 0);
53 operands[2] = gen_lowpart (QImode, operands[2]);
54 + operands[1] = gen_lowpart (QImode, operands[1]);
58 @@ -4682,11 +4685,12 @@
60 (ashiftrt:SI (match_dup 2) (const_int 16)))
61 (set (match_operand:HI 0 "s_register_operand" "")
62 - (subreg:HI (match_dup 3) 0))]
66 operands[2] = gen_reg_rtx (SImode);
67 operands[3] = gen_reg_rtx (SImode);
68 + operands[4] = gen_lowpart (HImode, operands[3]);