Bah, the arm-qemu-linux-uclibc sample isn't usefull. Base your work on the armeb-unkown-linux-uclibc sample instead.
1 Date: Fri, 06 Feb 2004 12:35:58 +0900
2 From: SUGIOKA Toshinobu <sugioka@itonet.co.jp>
3 Subject: [linux-sh:03150] Re: gcc 3.3 optimisation problem
5 Message-Id: <4.2.0.58.J.20040206122503.04fe3058@router.itonet.co.jp>
6 List-Help: <mailto:linux-sh-ctl@m17n.org?body=help>
7 List-Id: linux-sh.m17n.org
9 At 19:40 03/12/01 +0000, Stuart Menefy <stuart.menefy@st.com> wrote:
10 >On Sat, 29 Nov 2003 20:19:08 +0900 kkojima@rr.iij4u.or.jp wrote:
12 >> Dan Kegel <dank@kegel.com> wrote:
13 >> > Stuart Menefy wrote:
14 >> >> I've just been trying to put together a gcc 3.3.2 based toolchain, and
15 >> >> appear to be hitting a gcc optimisation bug. I was just wondering if
16 >> >> anyone else had seen anything similar.
18 >> >> The problem is seen when building the kernel, in the function
19 >> >> root_nfs_parse_addr(). I've extracted this into a small stand alone
20 >> >> program which demonstrates the problem.
22 >> > Excellent work. I haven't seen anything like this (doesn't mean much)
23 >> > and the sh-specific optimization bugs in the gcc bug database don't look
24 >> > similar. I think you should submit this as a bug report at
25 >> > http://gcc.gnu.org/bugzilla/
26 >> > It would be good if you could make your test case call abort() if
27 >> > the problem is present, so the test case can be automated.
29 >> Indeed. It'd be very nice to create a gcc PR for this issue.
31 >OK, I've done that. PR 13260.
33 PR 13260 was fixed by amylaar@gcc.gnu.org at 2003-12-04 20:10:29 on mainline(gcc-3.4).
34 I have back-ported that patch to gcc-3.3.3 and seems fine for me.
36 * sh-protos.h (sh_expand_t_scc): Declare.
37 * sh.h (PREDICATE_CODES): Add cmpsi_operand.
38 * sh.c (cmpsi_operand, sh_expand_t_scc): New functions.
39 * sh.md (cmpsi): Use cmpsi_operand. If T_REG is compared to
40 something that is not a CONST_INT, copy it into a pseudo register.
41 (subc): Fix description of new T value.
42 (slt, sgt, sge, sgtu): Don't clobber T after rtl generation is over.
43 (sltu, sleu, sgeu): Likewise.
44 (seq, sne): Likewise. Use sh_expand_t_scc.
46 diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh-protos.h gcc-3.3-20040126/gcc/config/sh/sh-protos.h
47 --- gcc-3.3-20040126-1/gcc/config/sh/sh-protos.h Tue Jan 13 02:03:24 2004
48 +++ gcc-3.3-20040126/gcc/config/sh/sh-protos.h Fri Jan 30 17:54:04 2004
50 extern int sh_can_redirect_branch PARAMS ((rtx, rtx));
51 extern void sh_expand_unop_v2sf PARAMS ((enum rtx_code, rtx, rtx));
52 extern void sh_expand_binop_v2sf PARAMS ((enum rtx_code, rtx, rtx, rtx));
53 +extern int sh_expand_t_scc (enum rtx_code code, rtx target);
55 extern void sh_va_start PARAMS ((tree, rtx));
56 extern rtx sh_va_arg PARAMS ((tree, tree));
57 diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.c gcc-3.3-20040126/gcc/config/sh/sh.c
58 --- gcc-3.3-20040126-1/gcc/config/sh/sh.c Thu Jan 15 03:11:36 2004
59 +++ gcc-3.3-20040126/gcc/config/sh/sh.c Fri Jan 30 17:53:58 2004
60 @@ -7870,6 +7870,15 @@
61 return register_operand (op, mode);
65 +cmpsi_operand (rtx op, enum machine_mode mode)
67 + if (GET_CODE (op) == REG && REGNO (op) == T_REG
68 + && GET_MODE (op) == SImode)
70 + return arith_operand (op, mode);
73 /* INSN is an sfunc; return the rtx that describes the address used. */
75 extract_sfunc_addr (rtx insn)
76 @@ -7917,4 +7926,33 @@
81 +sh_expand_t_scc (enum rtx_code code, rtx target)
83 + rtx result = target;
86 + if (GET_CODE (sh_compare_op0) != REG || REGNO (sh_compare_op0) != T_REG
87 + || GET_CODE (sh_compare_op1) != CONST_INT)
89 + if (GET_CODE (result) != REG)
90 + result = gen_reg_rtx (SImode);
91 + val = INTVAL (sh_compare_op1);
92 + if ((code == EQ && val == 1) || (code == NE && val == 0))
93 + emit_insn (gen_movt (result));
94 + else if ((code == EQ && val == 0) || (code == NE && val == 1))
96 + emit_insn (gen_rtx_CLOBBER (VOIDmode, result));
97 + emit_insn (gen_subc (result, result, result));
98 + emit_insn (gen_addsi3 (result, result, GEN_INT (1)));
100 + else if (code == EQ || code == NE)
101 + emit_insn (gen_move_insn (result, GEN_INT (code == NE)));
104 + if (result != target)
105 + emit_move_insn (target, result);
110 diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.h gcc-3.3-20040126/gcc/config/sh/sh.h
111 --- gcc-3.3-20040126-1/gcc/config/sh/sh.h Wed Apr 16 02:06:09 2003
112 +++ gcc-3.3-20040126/gcc/config/sh/sh.h Fri Jan 30 17:53:51 2004
113 @@ -3231,6 +3231,7 @@
114 {"arith_reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_VECTOR}}, \
115 {"binary_float_operator", {PLUS, MINUS, MULT, DIV}}, \
116 {"binary_logical_operator", {AND, IOR, XOR}}, \
117 + {"cmpsi_operand", {SUBREG, REG, CONST_INT}}, \
118 {"commutative_float_operator", {PLUS, MULT}}, \
119 {"equality_comparison_operator", {EQ,NE}}, \
120 {"extend_reg_operand", {SUBREG, REG, TRUNCATE}}, \
121 diff -ru gcc-3.3-20040126-1/gcc/config/sh/sh.md gcc-3.3-20040126/gcc/config/sh/sh.md
122 --- gcc-3.3-20040126-1/gcc/config/sh/sh.md Tue Jan 13 02:03:25 2004
123 +++ gcc-3.3-20040126/gcc/config/sh/sh.md Fri Jan 30 17:54:20 2004
124 @@ -685,11 +685,14 @@
126 (define_expand "cmpsi"
128 - (compare (match_operand:SI 0 "arith_operand" "")
129 + (compare (match_operand:SI 0 "cmpsi_operand" "")
130 (match_operand:SI 1 "arith_operand" "")))]
134 + if (GET_CODE (operands[0]) == REG && REGNO (operands[0]) == T_REG
135 + && GET_CODE (operands[1]) != CONST_INT)
136 + operands[0] = copy_to_mode_reg (SImode, operands[0]);
137 sh_compare_op0 = operands[0];
138 sh_compare_op1 = operands[1];
140 @@ -1147,7 +1150,9 @@
141 (match_operand:SI 2 "arith_reg_operand" "r"))
144 - (gtu:SI (minus:SI (match_dup 1) (match_dup 2)) (match_dup 1)))]
145 + (gtu:SI (minus:SI (minus:SI (match_dup 1) (match_dup 2))
150 [(set_attr "type" "arith")])
151 @@ -7223,6 +7228,10 @@
155 + if (sh_expand_t_scc (EQ, operands[0]))
157 + if (! rtx_equal_function_value_matters)
159 operands[1] = prepare_scc_operands (EQ);
162 @@ -7269,6 +7278,8 @@
166 + if (! rtx_equal_function_value_matters)
168 operands[1] = prepare_scc_operands (LT);
171 @@ -7371,6 +7382,8 @@
175 + if (! rtx_equal_function_value_matters)
177 operands[1] = prepare_scc_operands (GT);
180 @@ -7423,6 +7436,8 @@
184 + if (! rtx_equal_function_value_matters)
186 if (GET_MODE_CLASS (GET_MODE (sh_compare_op0)) == MODE_FLOAT)
189 @@ -7462,6 +7477,8 @@
190 sh_compare_op0, sh_compare_op1));
193 + if (! rtx_equal_function_value_matters)
195 operands[1] = prepare_scc_operands (GTU);
198 @@ -7486,6 +7503,8 @@
199 sh_compare_op1, sh_compare_op0));
202 + if (! rtx_equal_function_value_matters)
204 operands[1] = prepare_scc_operands (LTU);
207 @@ -7515,6 +7534,8 @@
211 + if (! rtx_equal_function_value_matters)
213 operands[1] = prepare_scc_operands (LEU);
216 @@ -7545,6 +7566,8 @@
220 + if (! rtx_equal_function_value_matters)
222 operands[1] = prepare_scc_operands (GEU);
225 @@ -7592,8 +7615,12 @@
229 - operands[1] = prepare_scc_operands (EQ);
230 - operands[2] = gen_reg_rtx (SImode);
231 + if (sh_expand_t_scc (NE, operands[0]))
233 + if (! rtx_equal_function_value_matters)
235 + operands[1] = prepare_scc_operands (EQ);
236 + operands[2] = gen_reg_rtx (SImode);
239 (define_expand "sunordered"